FPGA Designer Curriculum

An FPGA designer is a hardware engineer who needs to create and verify a design on an FPGA. This engineer may or may not have prior experience with FPGAs.

Instructor-led Training			Online Training
Introduction to VHDL (IHDL110) (8 hours)	or	Introduction to Verilog HDL (IHDL120) (8 hours)	Read Me First! (ORMF1000) (0.5 hours)
The Quartus® II Software Design Series: Foundation (IDSW110) (8 hours)			Basics of Programmable Logic (ODSW1005) (1 hour) 简体中文 (OCDSW1005) (1 hour)
The Quartus II Software Design Series: Timing Analysis (IDSW120) (8 hours)			How to Begin a Simple FPGA Design (ODSW1010) (1 hour)
The Quartus II Software Design Series: Verification (IDSW130) (8 hours)			VHDL Basics (OHDL1110) (1 hour) 简体中文 (OCHDL1110) (1 hour)		or	Verilog HDL Basics (OHDL1120) (1 hour) 简体中文 (OCHDL1120) (0.5 hours)
Interfacing to External Memory with Altera FPGAs (IMEM210) (8 hours)			The Quartus II Software Interactive Tutorial (ODSW1050) (4 hours)
The Quartus II Software Design Series: Optimization (IDSW140) (8 hours)			Using the Quartus II Software: An Introduction (ODSW1100) (1.5 hours) 简体中文 (OCDSW1100)		or	The Quartus II Software Design Series: Foundation (ODSW1110) (8 hours) 简体中文 (OCDSW1110)
Advanced VHDL Design Techniques (IHDL240) (8 hours)	or	Advanced Verilog HDL Design Techniques (IHDL230) 8 hours)	Using the Quartus II Software: Schematic Design (ODSW1105) (0.5 hours) 简体中文 (OCDSW1105)
			I/O Management (ODSW1107) (1 hour)
			TimeQuest Timing Analyzer (ODSW1115) (1.5 hours) 简体中文 (OCDSW1115)
			What’s New in the Quartus II Software Version 8.1 (ODSW1103) (1 hour)
			Early Pin Planning with Pin Planner in the Quartus II Software (ODSW1112) (0.5 hours)
			Overview of Mentor Graphic’s ModelSim Software (ODSW1120) (1 hour)
			Switching to the TimeQuest Timing Analyzer (ODSW1125) (1 hour)
			Stratix III Devices: Features and Capabilities (OSIII1110) (1 hour)		or	Cyclone III Devices: Features and Capabilities (OCIII1110) (1 hour)
			Design Planning Guidelines for High-Density FPGAs (ODSW1130) (1 hour)
			Introduction to Incremental Compilation (ODSW1136) (2.5 hours)	Power Analysis with the Quartus II Software (ODSW1146) (1 hour)			Using the Quartus II Software: Managing Design Changes with Chip Editor (ODSW1152) (1 hour)
			Design Partition Planner in the Quartus II Software (ODSW1138) (1 hour)	Power Distribution Network Design for Stratix III and Stratix IV (OPDN1100) (0.5 hours)			Using the Quartus II Software: Chip Planner (ODSW1155) (1 hour)
			SignalTap II Embedded Logic Analyzer (ODSW1164) (1.5 hours) 简体中文 (OCDSW1165)	Debugging & Communicating with an FPGA Using the Virtual JTAG Megafunction (OVJTAG1110) (0.5 hours)			Using High Performance Memory Interfaces in Altera FPGAs (OMEM1110) (1.5 hours)
				FPGA to Board Design Flow Using Mentor Graphics Tools (ODSW1170) (1.5 hours)			Constraining and Analyzing Timing for Source Synchronous Circuits with TimeQuest (ODSW1160) (1 hour)
							Constraining and Analyzing Double Data Rate Source Synchronous Interfaces (OMEM1120) (1 hour)