Cyclone FPGA Family Overview

Altera's Cyclone^® FPGA family provides the benefits of programmable logic at price points competitive with ASICs and ASSPs. Built from the ground up and based on extensive input from hundreds of customers, these low-cost devices provide high-volume application-focused features such as embedded memory, external memory interfaces, and clock management circuitry.

The Cyclone FPGA family, the first generation in the Altera^® Cyclone series, is the low-cost performance leader and includes an optimal feature set for high-volume, price-sensitive applications in the consumer, industrial, automotive, computing, and communications markets.

• Device overview
• Package and I/O details
• Configuration devices
• Industrial temperature support

Based on the cost-optimized all-layer-copper 1.5-V SRAM process, a Cyclone FPGA is available in densities ranging from 2,910 to 20,060 logic elements (LEs) with up to 294,912 bits of embedded RAM (as shown in Table 1). The Cyclone FPGA supports a variety of single-ended I/O standards such as LVTTL, LVCMOS, PCI, and SSTL-2/3 and offer differential I/O support via the LVDS and RSDS I/O standards on up to 129 channels. Each channel is capable of operating LVDS signals at up to 640 Mbps. The Cyclone FPGA family features dedicated circuitry to implement DDR SDRAM and FCRAM interfaces. With up to six outputs from two phase-locked loops (PLLs) per device and a hierarchical clocking structure, Cyclone FPGAs offer extensive clock management circuitry for complex designs. The combination of these features in the industry’s most efficient architecture makes this FPGA family the most flexible and cost-effective alternative to ASICs.

Designers needing lower costs, more density and functionality for high-volume applications can take advantage of Cyclone II or low-power Cyclone III FPGA families.

Table 1 outlines the Cyclone FPGA family members, features, and availability.

Note:

1. The EP1C3 device is also available in automotive-grade versions, which support an automotive temperature range of -40°C to +125°C.

Table 2 shows an overview of Cyclone device packaging and I/O pin counts.

Notes:

1. TQFP = thin quad flat pack
2. PQFP = plastic quad flat pack
3. BGA = ball-grid array

Table 3 shows the appropriate configuration devices to use for Cyclone FPGAs.

Table 4 shows industrial temperature support for Cyclone FPGAs.

Related Links

• Cyclone II FPGA
• Cyclone III FPGA
• Cyclone Device Family Data Sheet (PDF) in the Cyclone Device Handbook
• Automotive-Grade Devices  
• Performance in Low-Cost FPGA
• Benchmarking Methodology